1. Technical Field of the Invention
The present invention relates to a non-volatile magnetic memory using a tunnel magnetic resistor and a method for reading its information.
2. Description of the Related Art
A non-volatile magnetic memory using a Tunnel Magnetic Resistor (TMR) as a memory element is called as a Magnetic Random Access Memory (MRAM). FIG. 1 is a schematic view showing one example of a structure of TMR. In this example of TMR, an insulating film 2 having a thickness of about 2 nm is provided on a ferromagnetic film of a pin layer 3 having a thickness of about 20 nm. Further, a ferromagnetic film of a free layer 4 having a thickness of about 20 nm is provided on the insulating film 2. A direction of the magnetization in the pin layer 3 is fixed, and xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d is determined by use of a characteristics that the tunnel current is changed by the fact that a direction of magnetization in the free layer 4 is same direction (parallel) or the opposite direction (nonparallel) to that in the pin layer 3, that is a change in the resistance value.
Further, as shown in FIG. 2, electric current is respectively passed through a first wiring 14 and a second wiring 15 intersecting to each other, which were provided on and below the TMR 1 and the magnetization direction of the free layer 4 is inverted by a combined magnetic field produced by the current on the TMR 1 so that information of xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d can be written. For example, assuming that an easy axis 8 of magnetization in the TMR 1 is a direction of X in FIG. 2, when a direction of the second electric current 17 passed through the second wiring 15 extending to the direction of Y is a negative direction in the Y axis, writing of xe2x80x9c1xe2x80x9d can be performed on the other hand, when the direction of the second electric current 17 is a positive direction, writing of xe2x80x9c0xe2x80x9d can be performed. In the case of this example, the first electric current 16 in the first wiring 14 extending to the direction of X may be passed to any direction with respect to the X-axis.
FIGS. 3A and 3B show an example of a memory cell using a TMR. A one side terminal of TMR 1 is connected to a bit line 11 and the other side terminal is connected to a transistor 6. The selection of the cell is carried out by applying high voltage to a reading word line 13 to turn the transistor 6 ON (on electrical continuity conditions). Here, when an arbitrary voltage is applied to a bit line 11, different current is passed from the bit line 11 to Gnd through TMR 1 on the conditions of xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d. By measuring this current a reading operation is performed. A write operation is performed by making the transistor 6 off (electrical non-continuity conditions) and passing current to a writing word line 12 and the bit line 11 respectively. In this example of the memory cell, the bit line 11 is used in writing and reading in common. However, since TMR 1 is connected to the transistor 6 the word line is distributed to the writing word line 12 and the reading word line 13. As shown in FIG. 3B, since the writing word line 12 must be placed just below (or just above) TMR 1, a leading wiring 7 is required to connect the transistor 6 formed on a Si substrate with TMR 1.
FIG. 4 is a configuration of a MRAM described in xe2x80x9c2000 IEEE International Solid-State Circuits Conference pp 128-129xe2x80x9d. In this example, memory cells shown in FIGS. 3A and 3B are arranged in a matrix to form a cell array. Two adjacent memory cells on a word line are set to one unit cell 5 and this example is characterized in that information is complementarily read from or written in the respective TMRs in the unit cell 5. It is noted that an easy axis 8 of magnetization in each TMR is parallel to the direction of the word line. For example, when writing to the unit cell 5 is performed, a reading word line 13a is made low and transistors 6a, 6b are turned off, and electric current is passed through a writing word line 12a in an arbitrary direction and at the same time electric current is passed through a bit line 11a and a bit line 11b in different directions respectively so that complementary writing is carried out. The read operation is carried out by setting the reading word line 13a to a high mode, turning the transistors 6a, 6b on, selecting the bit lines 11a, 11b with a Y selector 21 to connect it to a read circuit 22, and applying the same voltage to the bit line 11a and the bit line 11b to detect the difference of current passed thorough TMRs 1a, 1b. 
FIGS. 5A and 5B shows another example of a memory cell using a TMR. One side terminal of TMR 1 is connected to a word line 10 and the other side terminal is connected to a bit line 11. Here, an easy axis 8 of magnetization in TMR 1 is parallel to the direction of the word line. Then writing to a cell is carried out by passing electric current 16 through the word line 10 in an arbitrary direction, and passing electric current 17 through the bit line 11 in a positive direction or a negative direction with respect to the direction of Y-axis in accordance with information to be written. Further, reading is carried out by applying arbitrary fixed voltage to the word line 10 and the bit line 11 and detecting values of current 23 passing through TMR 1. In this example of the memory cell the word line 10 and the bit line 11 are used in reading and writing in common.
FIG. 6 is a configuration of a MRAM described in a prior reference xe2x80x9cApplied Phisics Letters Vol. 77 Num. 13, 2000. 9. 25xe2x80x9d. In this example, a memory cell shown in FIGS. 5A and 5B is defined as a unit cell 5, and the unit cells 5 are arranged in a matrix to form a cell array. Here, the easy axis of magnetization in each TMR is parallel to the word line. Then writing to the cell 5 is carried out by passing electric current through a word line 10a in an arbitrary direction, and at the same time by passing electric current through a bit line 11a in a positive direction or a negative direction with respect to the direction of Y-axis in accordance with information to be written. Reading of information written in the cell 5 is carried out as follows. First, an arbitrary voltage V1 is applied to the word line 10a and 0 V is applied (connected to Gnd) to other word lines 10b and 10c other than the word line 10a. Then the bit line 11a is connected to a read circuit 22 and 0 V is applied (connected to Gnd) to the bit lines 11b and 11c other than the bit line 11a. At that time the bit line 11a is a virtual earth terminal and the voltage 10 of the bit line 11a becomes 0 V. A voltage of V1 is applied across TMR 1a and electric current 23 according to information stored in the cell 5 flows in the bit line 11a so that the current is input into the read circuit 22.
The read circuit 22 reads information with a self-reference system in which the information in the cell 5 is read twice and a current value read first is compared with a read current value of the second known information as shown in FIG. 7.
A transistor is added to each TMR in MRAM of FIG. 4 shown as a conventional example. Thus, since the selectivity of the cell is excellent and current flowing in TMR is read by complementation (difference), signal is doubled. However, since these transistors can be mounted on only Si substrate, a leading wiring 7 shown in FIG. 3B is needed and the cell size is not decreased. Further, these transistors are arranged in the cell array and no peripheral circuits such as a selector, a read circuit and the like can be arranged. Even if the scaling of the TMR size is advanced, the cell size is restrained by the design rule of the base elements including a transistor. Further, the presence of this leading wiring 7 increases the distance between the writing word line 12 and TMR 1. Since magnetic fields 18, 19 produced by the write current on TMR 1 is inversely proportional to this distance, the current value for producing a magnetic field (inverted field) required for inversion of magnetization is remarkably increased.
In MRAM of FIG. 6 shown as a conventional example the configurations of the respective cells are simple and the cell size becomes small. Thus, since the word line 10 and the bit line 11 can be formed with a very near distance to TMR 1, the current value during writing can be comparatively decreased. Further, peripheral circuits such as a selector, a read circuit and the like can be arranged in the cell array. However, in this example the selectivity of the cell is bad and the signal-to-noise ratio is deteriorated by the sneak current from the non-selective cell. That is when noise is interposed between the word lines 10b, 10c and the bit line 11a of FIG. 6, a minute sneak current flows through TMRs 1b, 1c and the current is input into the read circuit 22. The more the array size is increased the more the sum of the sneak currents is increased. For example, if a resistance value of TMR having information of xe2x80x9c1xe2x80x9d is 100 kxcexa9 and a resistance value of TMR having information of xe2x80x9c0xe2x80x9d is 110 kxcexa9, and a voltage of 0.5 V is applied across TMR, the read current values reaches 5 xcexcA and 4.2 xcexcA. When noise of 1 mV is interposed between the bit line 11a and the word lines 10b, 10c . . . in a 64xc3x9764 array, the sum of the sneak currents reach 0.6 xcexcA, which is substantially equal to the difference between the above-mentioned current values.
Further, since in this example the information of the cell is read by a self-reference system containing twice read operation and twice write operation as shown in FIG. 7, read time is increased. Further, by the reasons that the ratio of a resistance value of a TMR in parallel direction of magnetization to a resistance value of a TMR in nonparallel direction of magnetization (hereinafter referred to as MR ratio) is 10% to 20%, which is not so large, the selectivity of the above-mentioned cell is bad, the absolute value of a read current value must be measured and that the first read result must be stored, the read circuits are complicated and the circuit scale and power consumption is also increased. FIG. 8 is an example of a read circuit, which is operated based on a self-reference system. An offset current subtractor 30 removes an offset component in a signal current, which flows in a selective bit line 11a and a noise current removing filter 26 removes a high-frequency component in the above-mentioned sneak current and the like thereby to improve the signal-to-noise ratio. Further, the output signal of the noise current removing filter 26 is digitized by an AD converter 27 and the first read result is stored in a register 28. The read current during the second read is also digitized and the first read result and the second read result are compared with each other by a 1/0 determining circuit 29 thereby to perform the output of xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d. In this case, when the noise current removing filter 26 is realized by an integrator, integration time of about a few xcexcsec is required for the removal of noise. When as the AD converter 27 an 8 bit parallel type AD converter is used, a sample hold circuit, an encoder as well as 255 comparators are needed. Further, the register 28 needs a D type flip-flop or the like having the output bit number of the AD converter is needed and the 1/0 determining circuit 29 also needs several adders and subtractors.
The object of the present invention is to provide a non-volatile magnetic memory whose cell configuration is simple and which can be densely integrated and includes a read circuit having a small surface area and low power consumption.
A non-volatile magnetic memory according to a first aspect of the present invention comprises a cell array including a plurality of unit cells arranged in a matrix. The unit cell includes a first word line; a first memory element connected to the first word line and having an insulating film and at least two-layered ferromagnetic films provided so as to sandwich the insulating film therebetween; a second word line; a second memory element connected to the second word line and having an insulating film and at least two-layered ferromagnetic films provided so as to sandwich the insulating film therebetween; and a bit line connected to the first memory element and the second memory element and intersecting with the first word line and the second word line. Further the non-volatile magnetic memory comprises an information read part, which reads information from the first memory element and the second memory element by use of the fact that a tunnel electric current is changed by the conditions of a direction of magnetization in the at least two-layered ferromagnetic films. In the non-volatile magnetic memory the directions of easy axis of magnetization in the first memory element and the second memory element are the same as the direction of the bit line and the first memory element and the second memory element store information opposite to each other.
This non-volatile magnetic memory according to the first invention may further comprises a first voltage applying part for applying an arbitrary voltage V1 to the first word line in the read unit cell at the time of read; a second voltage applying part for applying an arbitrary voltage V2 different from the voltage V1 to the second word line in the read unit cell at the time of read; a connecting part for applying a voltage Vg expressed by Vg=(V1+V2)/2 to the bit line in the read unit cell and connecting the bit line in the read unit cell to the information read part at the time of read; and a disconnecting part for disconnecting a word line in the cell array other than the first word line and the second word line in the read unit cell and a bit line in the cell array other than the bit line in the read unit cell from the information read part at the time of read. The information read part may read information written in the read unit cell by detecting a direction of electric current, which flows into the bit line in the read unit cell.
The non-volatile magnetic memory according to the first invention may further comprise a first wiring having the voltage V1; a second wiring having the voltage V2; a third wiring having the voltage Vg; and a connecting part for connecting a bit line in the cell array other than the bit line in the read unit cell to the third wiring at the time of read. The first voltage applying part may connect the first word line in the read unit cell to the first wiring, and the second voltage applying part may connect the second word line in the read unit cell to the second wiring.
The non-volatile magnetic memory according to the first invention may further comprise a first voltage applying part for applying an arbitrary voltage V1 to the first word line in a read unit cell at the time of read; a second voltage applying part for applying an arbitrary voltage V2 different from the voltage V1 to the second word line in the read unit cell at the time of read; a connecting part for applying a voltage Vg expressed by Vg=(V1+V2)/2 to the bit line in the read unit cell and connecting the bit line in the read unit cell to the information read part at the time of read; an opening part for opening a word line in the cell array other than the first word line and the second word line in the read unit cell at the time of read; and a disconnecting part for disconnecting a bit line in the cell array other than the bit line in the read unit cell from the information read part at the time of read. The information read part may read information written in the read unit cell by detecting a direction of electric current, which flows into the bit line in the read unit cell.
The non-volatile magnetic memory according to the first invention may further comprise a first wiring having the voltage V1; and a second wiring having the voltage V2. The first voltage applying part may connect the first word line in the read unit cell to the first wiring, and the second voltage applying part may connect the second word line in the read unit cell to the second wiring.
In the non-volatile magnetic memory according to the first invention, the information read part may be provided in every bit line and information may be simultaneously read from a plurality of unit cells connected to the same word line.
The non-volatile magnetic memory according to the first invention may further comprise an information write part for passing electric current in bi-direction different from both the first word line and the second word line in a read unit cell.
A non-volatile magnetic memory according to a second invention comprises a cell array including a plurality of unit cells arranged in a matrix, and a plurality of reference cells arranged in a line. The unit cell includes a word line; a memory element connected to the word line and having an insulating film and at least two-layered ferromagnetic films provided so as to sandwich the insulating film therebetween; and a bit line connected to the memory element and intersecting with the word line. The reference cell includes a word line; a resistance element connected to the word line; and a bit line connected to the resistance element and intersecting with the word line. The non-volatile memory comprises an information read part, which reads information from the memory element by use of the fact that a tunnel electric current is changed by the conditions of a direction of magnetization in the at least two-layered ferromagnetic films. In the non-volatile memory, the direction of easy axis of magnetization in the memory element is the same as the direction of the bit line.
In the non-volatile magnetic memory according to the second invention a resistance value of the resistance element may be an intermediate value between a resistance value in the conditions where the memory element stores xe2x80x9c0xe2x80x9d and a resistance value in the conditions where the memory element stores xe2x80x9c1xe2x80x9d.
In the non-volatile magnetic memory according to the second invention the cell array may include a plurality of reference lines each having the plurality of reference cells; and the reference cell having both a read unit cell and a bit line and belonging to the reference line, which is nearest to the line to which the read unit cell belongs, may be utilized for the read of information from the read unit cell.
The non-volatile magnetic memory according to the second invention may further comprise a first voltage applying part for applying an arbitrary voltage V1 to the word line in a read unit cell at the time of read; a second voltage applying part for applying an arbitrary voltage V2 different from the voltage V1 to the word line in an usage reference cell at the time of read; a connecting part for applying a voltage Vg expressed by Vg=(V1+V2)/2 to the bit line of both the read unit cell and the usage reference cell and connecting a bit line of both the read unit cell and the usage reference cell to the information read part at the time of read; a disconnecting part for disconnecting a word line in the cell array other than the word line in the read unit cell and the word line in the usage reference cell, and a bit line in the cell array other than the bit lines of both the read unit cell and the usage reference cell from the information read part at the time of read. In the non-volatile memory the information read part may read information written in the read unit cell by detecting a direction of electric current, which flows into a bit line of both the read unit cell and the usage reference cell.
The non-volatile magnetic memory according to the second invention may further comprise a first wiring having the voltage V1; a second wiring having the voltage V2; a third wiring having the voltage Vg; and a connecting part for connecting a bit line in the cell array other than the bit line of both the read unit cell and the usage reference cell to the third wiring at the time of read. The first voltage applying part may connect the word line in the read unit cell to the first wiring, and the second voltage applying part may connect the word line in the usage reference cell to the second wiring.
The non-volatile magnetic memory according to the second invention may further comprise a first voltage applying part for applying an arbitrary voltage V1 to the word line in a read unit cell at the time of read; a second voltage applying part for applying an arbitrary voltage V2 different from the voltage V1 to the word line in an usage reference cell at the time of read; a connecting part for applying a voltage Vg expressed by Vg=(V1+V2)/2 to the bit line of both the read unit cell and the usage reference cell and connecting the bit line of both the read unit cell and the usage reference cell to the information read part at the time of read; an opening part for opening a word line in the cell array other than the word line in the read unit cell and a word line in the usage reference cell at the time of read; and a disconnecting part for disconnecting a bit line in the cell array other than the bit line of both the read unit cell and the usage reference cell from the information read part at the time of read. The information read part may read information written in the read unit cell by detecting a direction of electric current, which flows into the bit line of both the read unit cell and the usage reference cell.
The non-volatile magnetic memory according to the second invention may further comprise a first wiring having the voltage V1; and a second wiring having the voltage V2. The first voltage applying part may connect the word line in the read unit cell to the first wiring, and the second voltage applying part may connect the word line in the usage reference cell to the second wiring.
In the non-volatile magnetic memory according to the second invention, the information read part may be provided in every bit line and information may be simultaneously read from a plurality of unit cells connected to the same word line.
The non-volatile magnetic memory according to the first and second inventions may include a voltage source, which produces the voltage V1, the voltage V2 and the voltage Vg.
The non-volatile magnetic memory according to the first and second inventions may include a terminal circuit for connecting all word lines and all bit lines to a wiring of the voltage Vg at the time other than the time of read and the time of write.
The non-volatile magnetic memory according to the first invention may include a terminal circuit for connecting the first word line and the second word line in a selection unit cell and a bit line in the selection unit cell to a wiring having the voltage Vg, and disconnecting other word lines and other bit lines in the cell array from a wiring having the voltage Vg at the time of write.
The non-volatile magnetic memory according to the second invention may include a terminal circuit for connecting the word line in the selection unit cell, the word line in the usage reference cell and a bit line of both the selection unit cell and the usage reference cell to a wiring having the voltage Vg, and disconnecting other word lines and other bit lines in the cell array from a wiring having the voltage Vg at the time of write.
The non-volatile magnetic memory according to the first and second inventions may include a terminal circuit for disconnecting all word lines and all bit lines in the cell array from a wiring having the voltage Vg at the time of read.
The non-volatile magnetic memory according to the first invention may further comprise a first write circuit; a second write circuit; an X selector circuit for connecting a first word line and a second word line in a write unit cell to the first write circuit, and opening word lines in the cell array other than the first word line and the second word line in the write unit cell at the time of write; and a Y selector circuit for connecting a bit line in the write unit cell to the second write circuit, and opening bit lines in the cell array other than the bit line in the write unit cell at the time of write.
The non-volatile magnetic memory according to the second invention may further comprise a first write circuit; a second write circuit; an X selector circuit for connecting a word line in a write unit cell to the first write circuit, and opening word lines in the cell array other than the word line in the write unit cell at the time of write; and a Y selector circuit for connecting a bit line in the write unit cell to the second write circuit, and opening bit lines in the cell array other than the bit line in the write unit cell at the time of write.
The non-volatile magnetic memory according to the first and second inventions may include a connecting part for connecting a wiring having the voltage Vg to the bit lines in the cell array other than the bit line in the read unit cell at the time of read.
In the non-volatile magnetic memory according to the first and second inventions, the information read part may include an integrating part for integrating electric current, which flows into the bit line in the read unit cell; a current-voltage converting part for converting an output signal of the integrating part to voltage; and a comparison part for comparing an output voltage of the current-voltage converting part with the voltage Vg.
In the non-volatile magnetic memory according to the first and second inventions the cell array and other component may be superimposed.